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In the VLC transmitter, three-level RZ modulation is used for flicker-free transmission. Fig. 1 schematically shows the configuration of the VLC transmitter.

Fig. 1. 
Configuration of the visible light communication (VLC) transmitter.

The VLC transmitter is composed of a microprocessor, three FETs, and an LED array. The input signals to the VLC transmitter are codes based on the American Standard Code for Information Interchange (ASCII) in NRZ waveforms. When the input signal is applied to the input port, the microprocessor outputs two voltages (v₁ and v₂), which are applied to the gates of FET1 and FET2, respectively. The source currents of FET1 and FET2 are proportional to their gate voltages v₁ and v₂, respectively. The two source currents are added at the common source point and the total current (I_S) flows to the LED array. The output light of the LED array is proportional to the sum of the two source currents and its intensity constitutes a three-level RZ waveform. FET3 is not directly concerned with the RZ modulation; it is used for illumination control by changing the DC gate voltage v₃.

The three-level RZ waveform generation process is explained in Fig. 2. Fig. 2(a) is an arbitrary ASCII code character in NRZ waveform. For convenience, we used an 8-bit character “V” with a start bit and a stop bit. This format is generally used in universal asynchronous receiver and transmitter (UART) communication between computers or microprocessors. The microprocessor in the transmitter generates v₁ and v₂ signals corresponding to the NRZ input character, as shown in Figs. 2(b) and 2(c), respectively. When the NRZ input bit is in “high (H)” state, v₁ is in “H” state only during the former half part of the bit time (t_B) and in “low (L)” state elsewhere, as shown in Fig. 2(b). When the NRZ input bit is in “H” state, v₂ is in “L” state only during the latter half part of the bit time, and in “H” state elsewhere, as shown in Fig. 2 (c). The sum of the two source currents of FET1 and FET2 is proportional to the sum of the two voltages v₁ and v₂ thus, the LED light constitutes a three-level RZ waveform as shown in Fig. 2(d). The optical power densities at the lowest, medium, and highest levels are designated as 0, P₀, 2P₀, respectively, in Fig. 2(d).

Fig. 2. 
Three-level return-to-zero (RZ) signal generation: (a) non-RZ (NRZ) input, (b) voltage v₁, (c) voltage v₂, and (d) three-level RZ output.

When the input NRZ bit is in “H” state, the average optical power in the three-level RZ modulated light can be calculated as follows.

Here, t_B is a one-bit time of the NRZ input, t_H = 0.5t_B, which is the duration of the highest level in the three-level RZ modulated light, and P₀ is the optical power density at the medium level. When the input NRZ bit is in “L” state, the average optical power in the three-level RZ modulated light is constant at the medium level P₀, as shown in Fig. 2(d), that is

Thus, the average optical power is constant at the medium level P₀ independent of the bit state. Consequently, the average optical power of the three-level RZ modulated light achieves constant illumination without LED flicker.

To observe the conversion process from NRZ input to three-level RZ waveform in the VLC transmitter, a character “V” was transmitted repeatedly; we observed the corresponding signal waveforms in the transmitter. Fig. 3 shows the voltage waveforms that were observed with an oscilloscope.

Fig. 3. 
Waveforms observed in VLC transmitter: (a) input NRZ waveform, (b) voltage v₁, (c) voltage v₂, and (d) three-level RZ waveform.

Fig. 3(a) is the voltage waveform of a character “V” in 9.6 kbps UART format. The ASCII code of character “V” is “01010110.” When the least significant bit is sent first, the bit sequence from left to right becomes “01101010.” Further, a start bit “0” and a stop bit “1” are added before and after the character, respectively. Thus, the waveform of the character “V” becomes a 10-bit signal, i.e., “0011010101.”

In the UART transmission using Recommended Standard 232 (RS-232), “H” is assigned to a “0” bit and “L” to a “1” bit. Consequently, the NRZ waveform of the character “V” becomes “HHLLHLHLHL,” as shown in Fig. 3(a). Figs. 3(b) and 3(c) correspond to the voltages v₁ and v₂, which were applied to the gates of FET1 and FET2, respectively. Fig. 3(d) indicates the voltage at the common source point where the two FET source currents were added. The total current flowed into the LED array and three-level RZ visible light was radiated into the free space.

In the VLC transmitter, we used an ATmega8 microprocessor, three IRF540 FETs, and an LED array, which was fabricated in the form of a 2 × 3 planar array using six 1 W white-light LEDs.

The VLC receiver detects the visible light and recovers the data sent from the VLC transmitter. The schematic diagram of the VLC receiver is shown in Fig. 4.

Fig. 4. 
Configuration of the VLC receiver.

The VLC receiver is composed of a PD, amplifiers, an RC-HPF, and a microprocessor. The PD converts the input light to photocurrent, which flows through the load resistance R_L. The PD voltage across R_L is amplified and passed through the RC-HPF. The RC-HPF cuts off the 120 Hz noise and outputs spike signals at the rising and falling edges of the three-level RZ signal. The microprocessor regenerates the NRZ data using the spikes from the RC-HPF output. The data recovery process in the VLC receiver is illustrated in Fig. 5.

Fig. 5. 
Signal recovery process using spikes: (a) photodiode (PD) voltage, (b) spikes at resistor–capacitor high-pass filter (RC-HPF) output, (c) inverted negative spikes, and (d) regenerated NRZ waveform.

In environments where the 120 Hz optical noise from adjacent lighting lamps is incident on the PD, the three-level RZ signal is mixed with optical noise and the PD voltage is as illustrated in Fig. 5(a). When the PD voltage passes through the RC-HPF, the 120 Hz noise disappears, and voltage spikes appear at the RC-HPF output, as shown in Fig. 5(b). The positive spikes appear at the rising edges and the negative spikes at the falling edges of the three-level RZ signal. When the NRZ bit in the transmitter is in “H” state, two positive spikes and one negative spike appear in a one-bit time (t_B). When the NRZ bit in the transmitter is in “L” state, no spike appears. Thus, we can use the negative spikes for regenerating the NRZ data sent from the transmitter.

Fig. 5(c) illustrates the inverted negative spikes that appear at the diode output after the inverted amplifier. These inverted negative spikes are applied to the interrupt port of a microprocessor. For each negative spike, the microprocessor generates a NRZ “H” bit whose duration corresponds to the one-bit time (t_B) of the NRZ data. Thus, the NRZ data is regenerated in the receiver, as shown in Fig. 5(d). The NRZ waveform regenerated in the receiver has the same shape as that in the transmitter; further, a time delay of half a bit time (t_B/2) exists between the transmitter and the receiver.

To verify the operation of the RC-HPF in the VLC receiver, we simulated its response to the three-level RZ signal and the 120 Hz noise using the PSpice program. The three-level RZ voltage at the input of the RC-HPF for one “H” bit of the NRZ data can be expressed as follows.

Here, V_s is voltage amplitude, U(t) is the step function, and t_B is the one-bit time of the NRZ data in the VLC transmitter. Fig. 6 shows the simulated voltage of the RC-HPF. In the simulation, we used unit amplitude, that is V_S = 1; the bit time t_B = 100 μs; the resistance of the RC-HPF was set to R = 1 kΩ moreover, the capacitor C was used as a parameter. Fig. 6 shows the simulation result.

Fig. 6. 
Simulation of RC-HPF: (a) three-level RZ signal input voltage and (b) output spikes.

Figs. 6(a) and 6(b) are the three-level RZ input and output voltage waveforms of the RC-HPF, respectively. Positive and negative spikes appear at the rising and falling edges of the three-level RZ voltage, respectively. The negative spike appears once only at each “H” bit of NRZ data and it is used for recovering the NRZ bit sequence sent from the transmitter. The RC-HPF response to the 120 Hz noise was also simulated using the PSpice program. The 120 Hz noise can be expressed approximately as presented below.

Here, V_N is the noise voltage amplitude. In the simulation, we used unit amplitude, that is V_N = 1; moreover, the resistance of the RC-HPF was set to R = 1 kΩ, and the capacitor C was used as the parameter. Fig. 7 shows the simulation result.

Fig. 7. 
Simulation of RC-HPF: (a) input noise voltage and (b) output noise voltage.

Figs. 7(a) and 7(b) are the 120 Hz noise input and output voltage waveforms of the RC-HPF, respectively. As seen in Fig. 7 (b), the noise output voltage decreased as the capacitance decreased. For the capacitance smaller than 10 nF, the output noise decreased to a value 1/100 times lower than the input. Fig. 8 shows the amplitude variations of the negative spikes and the 120 Hz noise at the RC-HPF output corresponding to the changes in capacitance. In the simulation, the resistance of the RC-HPF was fixed at R = 1 kΩ and the capacitance C was varied as an independent variable.

Fig. 8. 
Spike and noise amplitude variations according to the capacitance at the RC-HPF output.

In Fig. 8, the spike amplitude shows the maximum value at a range of approximately 10 nF to 30 nF and the noise amplitude decreased monotonically as the capacitance reduced. In transmission experiments, we used C = 10 nF and R = 1 kΩ for the RC-HPF to obtain the maximum spike amplitude while suppressing the noise.

To observe the behavior of the VLC receiver, a character “V” was transmitted repeatedly and the voltage waveforms in the VLC receiver were observed. Fig. 9 shows the voltage waveforms observed using the oscilloscope.

Fig. 9. 
Waveforms observed in VLC receiver: (a) PD voltage, (b) spikes at RC-HPF output, (c) the inverted negative spikes, and (d) the regenerated NRZ waveform.

Fig. 9(a) shows the PD voltage when it received the three-level RZ signals while exposed to the 120 Hz noise. The large slope in PD voltage is due to the 120 Hz noise light. The RZ signal peak-to-peak amplitude was approximately 240 mV and the noise amplitude was approximately 250 mV. This is a situation where the noise strength is not negligible when compared to the signal.

Fig. 9(b) illustrates the positive and negative spikes that appeared at the RC-HPF output. When these spikes were applied to an inverted amplifier and a diode, the positive spikes were cut off and only the inverted negative spikes appeared at the diode output. The inverted negative spikes have positive voltages as shown in Fig. 9(c). These inverted negative spikes were applied to the interrupt port of the microprocessor. The microprocessor generated a rectangular pulse with a width of 104 μs per spike, which corresponds to the one-bit time in a 9.6 kbps UART signal. Consequently, the NRZ data was regenerated at the output of the microprocessor as shown in Fig. 9(d). This signal is in the same shape as the NRZ ASCII code sent from the VLC transmitter, which was shown in Fig. 3(a). The regenerated NRZ waveform in the receiver had a time delay of approximately 52 μs when compared to that in the transmitter. The time delay corresponds to half of the bit time of the NRZ data (t_B/2). This time delay appears because the negative spikes are generated at the half point of the NRZ “H” bit by the falling edge of the three-level RZ signal.

In the VLC receiver, we used a PIN PD, SFH-203, which has a current sensitivity of 0.6 A/W, sensitive area of 1 mm², rise time of approximately 100 ns with a load resistance of 1 kΩ. The resistance and capacitance of the RC-HPF were R = 1 kΩ, C = 10 nF, respectively; further, the cut-off frequency of the RC-HPF was approximately 16 kHz. For Amp-1 and Amp-2 in the receiver, we used OPA228 operational amplifiers, and the microprocessor used was an ATmega8.